vac
2014-08-18 14:37:39 UTC
URL:
<http://savannah.nongnu.org/bugs/?43011>
Summary: Bug in struct definition of __reg_UCSR1C and
__reg_UCSR0C in iom128rfa1.h
Project: AVR C Runtime Library
Submitted by: vac
Submitted on: Mon 18 Aug 2014 04:37:38 PM CEST
Category: Header
Severity: 3 - Normal
Priority: 5 - Normal
Item Group: Header files
Status: None
Percent Complete: 0%
Assigned to: None
Originator Email:
Open/Closed: Open
Discussion Lock: Any
Release: Any
Fixed Release: None
_______________________________________________________
Details:
There is a bug in iom128rfa1.h file.
Struct definition of __reg_UCSR1C got 10 bits instead of 8:
struct __reg_UCSR1C {
unsigned int ucpol1 : 1; /* Clock Polarity */
unsigned int ucsz1 : 2; /* Character Size */
unsigned int ucpha1 : 1; /* Clock Phase */
unsigned int udord1 : 1; /* Data Order */
unsigned int usbs1 : 1; /* Stop Bit Select */
unsigned int upm1 : 2; /* Parity Mode */
unsigned int umsel1 : 2; /* USART Mode Select */
};
There are two extra bits (ucpha1 and udord1) in definition of register which
are used only in MSPIM mode of USART.
Setting for example parity mode (upm1) in result is setting wrong bits: bit 6
and 7 is set instead of bit 4 and 5.
Same applies to __reg_UCSR0C struct.
_______________________________________________________
Reply to this item at:
<http://savannah.nongnu.org/bugs/?43011>
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<http://savannah.nongnu.org/bugs/?43011>
Summary: Bug in struct definition of __reg_UCSR1C and
__reg_UCSR0C in iom128rfa1.h
Project: AVR C Runtime Library
Submitted by: vac
Submitted on: Mon 18 Aug 2014 04:37:38 PM CEST
Category: Header
Severity: 3 - Normal
Priority: 5 - Normal
Item Group: Header files
Status: None
Percent Complete: 0%
Assigned to: None
Originator Email:
Open/Closed: Open
Discussion Lock: Any
Release: Any
Fixed Release: None
_______________________________________________________
Details:
There is a bug in iom128rfa1.h file.
Struct definition of __reg_UCSR1C got 10 bits instead of 8:
struct __reg_UCSR1C {
unsigned int ucpol1 : 1; /* Clock Polarity */
unsigned int ucsz1 : 2; /* Character Size */
unsigned int ucpha1 : 1; /* Clock Phase */
unsigned int udord1 : 1; /* Data Order */
unsigned int usbs1 : 1; /* Stop Bit Select */
unsigned int upm1 : 2; /* Parity Mode */
unsigned int umsel1 : 2; /* USART Mode Select */
};
There are two extra bits (ucpha1 and udord1) in definition of register which
are used only in MSPIM mode of USART.
Setting for example parity mode (upm1) in result is setting wrong bits: bit 6
and 7 is set instead of bit 4 and 5.
Same applies to __reg_UCSR0C struct.
_______________________________________________________
Reply to this item at:
<http://savannah.nongnu.org/bugs/?43011>
_______________________________________________
Message sent via/by Savannah
http://savannah.nongnu.org/