John Kasunich
2016-09-21 16:04:58 UTC
URL:
<http://savannah.nongnu.org/bugs/?49150>
Summary: Incorrect bit definitions in io90pwm3b.h
Project: AVR C Runtime Library
Submitted by: jmkasunich
Submitted on: Wed 21 Sep 2016 04:04:56 PM GMT
Category: Header
Severity: 3 - Normal
Priority: 5 - Normal
Item Group: Header files
Status: None
Percent Complete: 0%
Assigned to: None
Originator Email:
Open/Closed: Open
Discussion Lock: Any
Release: Any
Fixed Release: None
_______________________________________________________
Details:
Two incorrect bit definitions in the General Timer/Counter Control Register
GTCCR:
According to the Atmel datasheet (document 4317, section 13.4), ICPSEL1 is bit
6, and TSM is bit 7.
According to io90pwm3b.h, lines 261 & 262, those bits are 2 and 3
respectively.
I have confirmed that ICPSEL1 needs to be 6 by testing on actual hardware.
The incorrect definitions are present in version 2.0 and have been present
since the file was added. Odd that it hasn't been noticed before, although it
does require special circumstances: user must be doing captures with timer 1,
and must be using capture input B, pin PB6. (The default is to use input A,
pin PD4.)
_______________________________________________________
Reply to this item at:
<http://savannah.nongnu.org/bugs/?49150>
_______________________________________________
Message sent via/by Savannah
http://savannah.nongnu.org/
<http://savannah.nongnu.org/bugs/?49150>
Summary: Incorrect bit definitions in io90pwm3b.h
Project: AVR C Runtime Library
Submitted by: jmkasunich
Submitted on: Wed 21 Sep 2016 04:04:56 PM GMT
Category: Header
Severity: 3 - Normal
Priority: 5 - Normal
Item Group: Header files
Status: None
Percent Complete: 0%
Assigned to: None
Originator Email:
Open/Closed: Open
Discussion Lock: Any
Release: Any
Fixed Release: None
_______________________________________________________
Details:
Two incorrect bit definitions in the General Timer/Counter Control Register
GTCCR:
According to the Atmel datasheet (document 4317, section 13.4), ICPSEL1 is bit
6, and TSM is bit 7.
According to io90pwm3b.h, lines 261 & 262, those bits are 2 and 3
respectively.
I have confirmed that ICPSEL1 needs to be 6 by testing on actual hardware.
The incorrect definitions are present in version 2.0 and have been present
since the file was added. Odd that it hasn't been noticed before, although it
does require special circumstances: user must be doing captures with timer 1,
and must be using capture input B, pin PB6. (The default is to use input A,
pin PD4.)
_______________________________________________________
Reply to this item at:
<http://savannah.nongnu.org/bugs/?49150>
_______________________________________________
Message sent via/by Savannah
http://savannah.nongnu.org/