Discussion:
[avr-libc-dev] [bug #36611] _delay_loop_2 must not use constraint "w" with all targets
Georg-Johann Lay
2012-06-08 22:36:28 UTC
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URL:
<http://savannah.nongnu.org/bugs/?36611>

Summary: _delay_loop_2 must not use constraint "w" with all
targets
Project: AVR C Runtime Library
Submitted by: gjlayde
Submitted on: Fr 08 Jun 2012 22:36:27 GMT
Category: Header
Severity: 3 - Normal
Priority: 5 - Normal
Item Group: Header files
Status: None
Percent Complete: 0%
Assigned to: None
Open/Closed: Open
Discussion Lock: Any
Release: 1.8.0
Fixed Release: None

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Details:

./include/util/delay_basic.h

implements:

void
_delay_loop_2(uint16_t __count)
{
__asm__ volatile (
"1: sbiw %0,1" "\n\t"
"brne 1b"
: "=w" (__count)
: "0" (__count)
);
}

This won't work for tiny tiny targets because

- they don't have SBIW
- compiler with suprt for these targets empty the register
class associated with "w". Thus, the compiler will throw
an error if it sees "w".







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Eric Weddington
2012-11-16 18:13:06 UTC
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Update of bug #36611 (project avr-libc):

Priority: 5 - Normal => 9 - Immediate

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Follow-up Comment #1:

Johann, what do you recommend to fix this?

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Georg-Johann Lay
2012-11-16 21:04:06 UTC
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Follow-up Comment #2, bug #36611 (project avr-libc):

Factor out the ISA / architecture by means of #if / #ifdef __HAVE_ADIW__ or
__HAVE_CONSTRAINT_W__ or __AVR_ARCH__ or whatever your tools provide and use
2-insn decrement alongside with "d".

If your tools have __builtin_delay_cycles you can use that, but make sure that
respective insn constraint does not suffer from the same flaw (AFAIR this is
the case with Atmel patches)

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Eric Weddington
2012-11-16 21:17:18 UTC
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Follow-up Comment #3, bug #36611 (project avr-libc):

We'll need to verify that __builtin_delay_cycles in gcc is still valid.

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Cameron Tacklind
2017-05-10 01:45:08 UTC
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Follow-up Comment #4, bug #36611 (project avr-libc):

I ran into this problem and just re-wrote the *__delay_loop_2_* assembly.

This should be equivalent for all AVRs. It should even take the same number of
clock cycles (since *_sbiw_* takes 2 clock cycles).

My initial tests suggest this is working. Since *___count_* is a 2 byte
number, *_%A0_* and *_%B0_* should always work as expected.


void
_delay_loop_2(uint16_t __count)
{
__asm__ volatile (
"1: subi %A0,1" "\n\t"
"sbci %B0,0" "\n\t"
"brne 1b"
: "=d" (__count)
: "0" (__count)
);
}


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